The sector erase architecture enables memory sectors to be reprogrammed and erased with the other sectors’ data contents being affected. Usually a sector is erased and also verified within a second. When it is shipped from the factory, the device is erased.
Both erase and program operations are disabled by protection feature on the hardware sector group in any combination of the memory’s eight sector groups. There are four adjacent sectors in each sector group.
The Erase Suspend feature allows erase to be put on hold by the system for any length of time for reading program data or or data from, a sector that isn’t being erased. That allows true background erase to be accomplished.
Only one 5.0 volt power supply is needed by the device for both write and read functions. Internally regulated and generated voltages are given for erase and program operations. During power transitions write operations are automatically inhibited by a low VCC detector.
The host system is able to detect whether an erase or program cycle is complete through using the DQ6 (toggle) status, DQ7 (Data# Polling) and RY/BY# pin bits. After an erase or program cycle is finished it returns to read mode automatically.
Any operation that is in progress is terminated by the hardware RESET# pin. Its internal state machine gets to read mode. This RESET# pin might be connected to the reset circuitry of the system. So if a system reset happens during either an Embedded Erase or Embedded Program algorithm, the device will be reset to read mode automatically. It allows the Flash memory’s boot-up firmware to be read by the system’s microprocessor.
Years worth of Flash memory manufacturing experience is combined by AMD Flash technology to produce the highest levels of cost effectiveness, reliability and quality. Fowler-Nordheim tunneling is used by the device to erase all bits in a sector electrically at the same time. The hot electron injection programming mechanism is used to program the bytes one byte at a time.