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Part Number: Am29F032B-75EF

Link to Datasheet

Manufacturer: Spansion

Quantity Available: 3224

Lifecycle: Obsolete

MSL: 3

Package Description: Thin Small Outline Package

Pin Count: 40

Mounting Type: Surface Mount

ECCN: 3A991.b.1.a

Schedule B: 8542320050

RoHS: Compliant

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General Description

The Spanison Am29F032B is a 5.0 volt-only, 32 Mbit Flash memory that is organized into 4,194,304 bytes with 8 bits each. There is 4 Mbytes worth of data that is divided into 64 sectors that are each 64 kbytes that provides flexible erase capability. The DQ0�”DQ7 has 8 bits of data. The Am29F032B comes in both 44-pin SO and 40-pin TSOP packages. AMD 0.32 μm process technology is used to make the Am29F032B. The device has been designed for in-system programming and comes with a standard 5.0 volt VCC supply system. A 12.0 volt VPP isn’t needed for erase or program operations. Standard EPROM programmers can be used to program the device as well.

The standard device offers 90 and 70 ns access times, which allows high-speed microprocessors to run without any wait states. The device has separate output enable (OE#), write enable (WE#) and chip enable (CE#) controls so that bus contention is eliminated.

The device is completely set compatible with the single-power supply JEDEC Flash standard. Standard microprocessor write timings are used to write commands to the command register. Register contents are inputs to the internal state machine controlling the programming and erase circuitry. In addition, write cycles internally latch data and addresses needed for the erase and programming operations. Reading data from the device is very similar to reading from EPROM and 12.0 volt Flash devices.

The program command sequence is executed to program the device. It invokes the Embedded Program algorithm, which is an internal algorithm that times the pulse widths of the program automatically and verifies the right cell margin. The erase command sequence is executed to erase the device. The Embedded Erase algorithm is invoked – which is an internal algorithm that pre-programs the array automatically (if it isn’t programmed already) before the erase operation is executed. During erase, proper cell margin is verified and erase pulse widths are automatically timed by the device.

The sector erase architecture enables memory sectors to be reprogrammed and erased with the other sectors’ data contents being affected. Usually a sector is erased and also verified within a second. When it is shipped from the factory, the device is erased.

Both erase and program operations are disabled by protection feature on the hardware sector group in any combination of the memory’s eight sector groups. There are four adjacent sectors in each sector group.

The Erase Suspend feature allows erase to be put on hold by the system for any length of time for reading program data or or data from, a sector that isn’t being erased. That allows true background erase to be accomplished.

Only one 5.0 volt power supply is needed by the device for both write and read functions. Internally regulated and generated voltages are given for erase and program operations. During power transitions write operations are automatically inhibited by a low VCC detector.

The host system is able to detect whether an erase or program cycle is complete through using the DQ6 (toggle) status, DQ7 (Data# Polling) and RY/BY# pin bits. After an erase or program cycle is finished it returns to read mode automatically.

Any operation that is in progress is terminated by the hardware RESET# pin. Its internal state machine gets to read mode. This RESET# pin might be connected to the reset circuitry of the system. So if a system reset happens during either an Embedded Erase or Embedded Program algorithm, the device will be reset to read mode automatically. It allows the Flash memory’s boot-up firmware to be read by the system’s microprocessor.

Years worth of Flash memory manufacturing experience is combined by AMD Flash technology to produce the highest levels of cost effectiveness, reliability and quality. Fowler-Nordheim tunneling is used by the device to erase all bits in a sector electrically at the same time. The hot electron injection programming mechanism is used to program the bytes one byte at a time.